High-Speed DD Transmission Using a Silicon Receiver Co-Integrated With a 28-nm CMOS Gain-Tunable Fully-Differential TIA

We report >100-Gb/s direct-detection (DD) transmission using an integrated silicon optical receiver, which comprised a fully-differential 28-nm complementary metal-oxide-semiconductor (CMOS) transimpedance amplifier (TIA) wire-bonded to Silicon-Germanium (SiGe) balanced photodiode (PD). The TIA architecture enabled significant bit-error-rate (BER) and signal-to-noise ratio improvements over single-output design when introducing it the DD transmission. experimentally validated its effectiveness in both back-to-back (B2B) 2-km long standard single-mode fibre (SSMF) links 50/100-Gb/s signals, including Nyquist on-off keying (OOK), 4-ary pulse amplitude modulation (PAM4), uniformly-loaded orthogonal frequency division multiplexing (DDO-OFDM) adaptively-loaded DDO-OFDM. Furthermore, we demonstrate that receiver was capable of balancing trade-off between electrical bandwidth gain by simply adjusting voltage supply TIA. Without need for amplification while keeping BERs below 7% forward error correction limit, up 173.22-Gb/s 139.86-Gb/s DDO-OFDM achieved B2B transmission, respectively. demonstrated results highlight potential fabricated CMOS process high-speed short-reach interconnects.